Firmware Developer

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Communications Security (COMSEC) Systems Section

Naval Research Laboratory

The Communications Security (COMSEC) Systems Section, Code 5541, in the Center for High Assurance Computer Systems at the Naval Research Laboratory (NRL), provides the Navy's core in-house expertise in the development and application of Information Systems Security (INFOSEC) technology and Information Assurance (IA).

Code 5541 ensures Navy communication systems meet both their communication requirements and their security requirements. Engineers work closely with other government agencies and Navy system developers to develop high assurance information security products (e.g., components, toolkits, equipment, and systems) to meet Navy and joint service requirements. Code 5541 performs analyses and experiments to perform trade studies and develops prototype systems to permit both laboratory and field investigations. This section builds on an understanding of developing systems to perform research leading to advanced system concepts and security architectures, development of new analysis tools and techniques, and new INFOSEC technology.

Task Description:

The successful candidate for this position will assist Code 5541 with its mission to analyze and perform experiments to develop prototype information security systems.  Tasks for this position will include (but not limited to): Firmware/Software Design & Development and Application Vulnerability Analysis. 

The candidate will be working on the Programmable Embeddable INFOSEC Product (PEIP) which is a software based cryptographic module or the PUMP which is a Cross Domain Product. The candidate will be working with an inter-disciplinary team consisting of Electrical Engineers and Software Engineers. The successful candidate will be an experienced firmware engineer.  The candidate will also be required to strictly conform to the specified development process.

Location:  Washington DC

Requirements:

1. Must Have
   1. Minimum B.S. in Computer or Electrical Engineering
   2. 5 years (or equivalent) development experience
   3. VHDL or Verilog experience
   4. Experience with developing high complexity, high speed FPGA designs
   5. Experience integrating FPGAs with on-board processors, memory and other external devices
   6. FPGA design experience including:
      1. Constraint driven development
         1. Timing constraints
         2. Placement constraints
      2. High speed memory and processor interfaces
      3. Behavioral simulation
      4. Scripting for FPGA build and simulation
   7. Minimum Secret Clearance
2. Nice to Have (in order of desirability)
   1. Xilinx FPGA design experience (Vivado tool suite)
   2. Questa or Modelsim experience
   3. C/C++
   4. High speed serial interfaces (PCIe, Ethernet)
   5. High bandwidth parallel interfaces (DDR2/3 SDRAM)
   6. Schematic capture and PCB design

NRL is an equal employment opportunity employer